2017-09-23 15:20:55 +00:00
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/* Main module. This version just initializes the LCD and then drops
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to a low power mode, letting the WDT do the work on a slow
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interval.
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*/
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#include <msp430.h>
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2017-09-25 00:44:05 +00:00
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#include <string.h>
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2017-09-23 15:20:55 +00:00
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#include "lcd.h"
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2017-09-24 22:52:30 +00:00
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#include "rtc.h"
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2017-09-26 13:15:55 +00:00
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#include "keypad.h"
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2017-09-26 16:59:02 +00:00
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#include "apps.h"
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2017-09-23 15:20:55 +00:00
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2017-09-25 20:26:18 +00:00
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//Initialize the XT1 crystal, and stabilize it.
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void xtal_init(){
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P5SEL |= BIT0 + BIT1; // Select XT1
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UCSCTL6 |= XCAP_3; // Internal load cap
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// Loop until XT1,XT2 & DCO stabilizes
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do{
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UCSCTL7 &= ~(XT1LFOFFG + DCOFFG);
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// Clear LFXT1,DCO fault flags
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SFRIFG1 &= ~OFIFG; // Clear fault flags
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}while (SFRIFG1 & OFIFG); // Test oscillator fault flag
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UCSCTL6 &= ~(XT1DRIVE_3); // Xtal is now stable, reduce drive
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// strength
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//See page 125 of the family guide.
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//UCSCTL4 = SELM_3 + SELS_0 + SELA_0; //XT1 for ACLK and SMCLK, MCLK from DCO.
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UCSCTL4 = SELM_0 + SELS_0 + SELA_0; //XT1 for everything; very slow CPU.
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}
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2017-09-23 15:20:55 +00:00
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int main(void) {
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WDTCTL = WDTPW + WDTHOLD; // Stop WDT
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lcd_init();
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2017-09-25 20:26:18 +00:00
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xtal_init();
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2017-09-24 22:00:54 +00:00
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rtc_init();
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2017-09-26 13:15:55 +00:00
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key_init();
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2017-09-26 16:59:02 +00:00
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app_init();
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2017-09-23 15:20:55 +00:00
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2017-09-25 00:44:05 +00:00
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// Setup and enable WDT 250ms, ACLK, interval timer
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2017-09-24 22:00:54 +00:00
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WDTCTL = WDT_ADLY_250;
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2017-09-23 15:20:55 +00:00
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SFRIE1 |= WDTIE;
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2017-09-25 20:26:18 +00:00
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// Turn off SVSH, SVSM
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PMMCTL0_H = 0xA5;
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SVSMHCTL = 0;
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SVSMLCTL = 0;
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PMMCTL0_H = 0x00;
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__bis_SR_register(LPM3_bits +GIE); // Enter LPM3
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//__bis_SR_register(LPM0_bits + GIE); // Enter LPM0 w/interrupt
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2017-09-24 20:38:14 +00:00
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while(1);
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2017-09-23 15:20:55 +00:00
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}
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// Watchdog Timer interrupt service routine, calls back to handler functions.
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void __attribute__ ((interrupt(WDT_VECTOR))) watchdog_timer (void) {
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2017-09-25 00:44:05 +00:00
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lcd_wdt();
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2017-09-23 15:20:55 +00:00
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}
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