Cleanup of POCSAG test.

This commit is contained in:
Travis Goodspeed 2019-04-20 13:05:31 -04:00
parent 9e3c497d26
commit 4a9033fea3

View File

@ -1,7 +1,9 @@
#!/usr/bin/python2
## This is a quick and dirty python client for communicating with a
## GoodWatch over its UART.
## GoodWatch over its UART. I mostly use it to quickly prototype
## radio features that I'll later rewrite in clean C, so this is often
## the ugliest code of the project.
import serial, time, sys, argparse, progressbar;
@ -18,7 +20,7 @@ def chr16(word):
# Radio Core Registers
IOCFG2 =0x00 #IOCFG2 - GDO2 output pin configuration
IOCFG1 =0x01 #IOCFG1 - GDO1 output pin configuration
IOCFG0 =0x02 #IOCFG1 - GDO0 output pin configuration
IOCFG0 =0x02 #IOCFG0 - GDO0 output pin configuration
FIFOTHR =0x03 #FIFOTHR - RX FIFO and TX FIFO thresholds
SYNC1 =0x04 #SYNC1 - Sync word, high byte
SYNC0 =0x05 #SYNC0 - Sync word, low byte
@ -147,6 +149,7 @@ ookconfig=[
FSCAL2 , 0x2A, # Frequency Synthesizer Calibration
FSCAL1 , 0x00, # Frequency Synthesizer Calibration
FSCAL0 , 0x1F, # Frequency Synthesizer Calibration
PKTCTRL1, 0x00, #Packet automation control, fixed length without CRC.
PKTCTRL0, 0x00, #Packet automation control, fixed length without CRC.
PKTLEN, 32, # PKTLEN Packet length.
0, 0
@ -164,8 +167,6 @@ pocsagconfig=[
MDMCFG4, 0xF5, # Modem Configuration, wide BW
#MDMCFG4, 0xC5, # Modem Configuration, narrow BW
MDMCFG3, 0x83, # Modem Configuration
# #MDMCFG2, 0x30, # Modem Configuration, no sync
#MDMCFG2, 0x33, # Modem Configuration, 30/32 sync
MDMCFG2, 0x82, # 2-FSK, current optimized, 16/16 sync
MDMCFG1, 0x72, # Long preamble.
# FREND0 , 0x11, # Front End TX Configuration
@ -179,12 +180,24 @@ pocsagconfig=[
FSCAL0 , 0x1F, # Frequency Synthesizer Calibration
PKTCTRL0, 0x00, # Packet automation control, fixed length without CRC.
# PKTLEN, 64, # PKTLEN Packet length.
PKTLEN, 60, # PKTLEN Packet length.
SYNC1, 0x83,
SYNC0, 0x2d,
SYNC1, 0x83, # 832d first
SYNC0, 0x2d,
ADDR, 0xea, # ea27 next, but we can only match one piece of it.
TEST0, 0x09, #Who knows?
TEST2, 0x81, #Who knows?
TEST1, 0x35,
TEST0, 0x09,
MCSM1, 0x30, # MCSM1, return to IDLE after packet. Or with 2 for TX carrier tes.
MCSM0, 0x10, # MCSM0 Main Radio Control State Machine configuration.
IOCFG2, 0x29, # IOCFG2 GDO2 output pin configuration.
IOCFG0, 0x06, # IOCFG0 GDO0 output pin configuration.
FIFOTHR, 0x47, # RX FIFO and TX FIFO Thresholds
#PKTCTRL1, 0x00, # No address check, no status.
PKTCTRL1, 0x01, # Exact address check, no status.
0, 0
];
@ -347,6 +360,7 @@ class GoodWatch:
freq2=(num>>16) & 0xFF;
freq1=(num>> 8) & 0xFF;
freq0= num & 0xFF
#print "FREQ set to %02x %02x %02x" % (freq2, freq1, freq)
self.radioconfig([
FREQ2, freq2,
FREQ1, freq1,
@ -470,15 +484,15 @@ if __name__=='__main__':
time.sleep(1);
goodwatch.radioonoff(1);
print "Configuring radio.";
goodwatch.radioconfig(beaconconfig);
#goodwatch.radioconfig(beaconconfig);
goodwatch.radioconfig(pocsagconfig);
#Standard DAPNET frequency.
goodwatch.radiofreq(439.988);
while 1:
pkt=goodwatch.radiorx();
if len(pkt)>1:
if len(pkt)>1: # and pkt[0]=='\xea' and pkt[1]=='\x27':
print pkt.encode('hex');
time.sleep(1);
time.sleep(0.1);
if args.beaconsniff!=None:
print "Turning radio on.";