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Reduces 32kHz load capacitance. I believe it is now at the appropriate level.

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Travis Goodspeed 2018-04-06 11:30:19 -04:00
parent fb486c80c3
commit 8179d2c023
1 changed files with 1 additions and 1 deletions
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2
firmware/ucs.c
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@ -25,7 +25,7 @@ void ucs_slow(){
//! Initialize the XT1 crystal, and stabilize it. //! Initialize the XT1 crystal, and stabilize it.
void ucs_init(){ void ucs_init(){
P5SEL |= BIT0 + BIT1; // Select XT1 P5SEL |= BIT0 + BIT1; // Select XT1
UCSCTL6 |= XCAP_3; // Internal load cap UCSCTL6 |= XCAP_1; // Internal load cap
// Loop until XT1 & DCO stabilizes // Loop until XT1 & DCO stabilizes
do{ do{