mirror of
https://github.com/kamilsss655/uv-k5-firmware-custom
synced 2024-11-22 19:18:56 +00:00
75 lines
1.8 KiB
C
75 lines
1.8 KiB
C
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/* Copyright 2023 Dual Tachyon
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* https://github.com/DualTachyon
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef DRIVER_ADC_H
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#define DRIVER_ADC_H
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#include <stdbool.h>
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#include <stdint.h>
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enum ADC_CH_MASK {
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ADC_CH0 = 0x0001U,
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ADC_CH1 = 0x0002U,
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ADC_CH2 = 0x0004U,
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ADC_CH3 = 0x0008U,
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ADC_CH4 = 0x0010U,
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ADC_CH5 = 0x0020U,
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ADC_CH6 = 0x0040U,
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ADC_CH7 = 0x0080U,
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ADC_CH8 = 0x0100U,
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ADC_CH9 = 0x0200U,
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ADC_CH10 = 0x0400U,
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ADC_CH11 = 0x0800U,
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ADC_CH12 = 0x1000U,
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ADC_CH13 = 0x2000U,
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ADC_CH14 = 0x4000U,
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ADC_CH15 = 0x8000U,
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};
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typedef enum ADC_CH_MASK ADC_CH_MASK;
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typedef struct {
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uint8_t CLK_SEL;
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ADC_CH_MASK CH_SEL;
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uint8_t AVG;
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uint8_t CONT;
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uint8_t MEM_MODE;
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uint8_t SMPL_CLK;
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uint8_t SMPL_SETUP;
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uint8_t SMPL_WIN;
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uint8_t ADC_TRIG;
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uint16_t EXTTRIG_SEL;
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bool CALIB_OFFSET_VALID;
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bool CALIB_KD_VALID;
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uint8_t DMA_EN;
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uint16_t IE_CHx_EOC;
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uint8_t IE_FIFO_HFULL;
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uint8_t IE_FIFO_FULL;
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} ADC_Config_t;
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uint8_t ADC_GetChannelNumber(ADC_CH_MASK Mask);
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void ADC_Disable(void);
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void ADC_Enable(void);
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void ADC_SoftReset(void);
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uint32_t ADC_GetClockConfig(void);
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void ADC_Configure(ADC_Config_t *pAdc);
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void ADC_Start(void);
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bool ADC_CheckEndOfConversion(ADC_CH_MASK Mask);
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uint16_t ADC_GetValue(ADC_CH_MASK Mask);
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#endif
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