diff --git a/doc/APIchanges b/doc/APIchanges index 5751216b24..fb54c3fbc9 100644 --- a/doc/APIchanges +++ b/doc/APIchanges @@ -2,6 +2,9 @@ The last version increases of all libraries were on 2024-03-07 API changes, most recent first: +2024-07-25 - xxxxxxxxx - lavu 59.29.100 - cpu.h + Add AV_CPU_FLAG_RVB. + 2024-07-xx - xxxxxxxxxx - lavf 61 - avformat.h Deprecate avformat_transfer_internal_stream_timing_info() and av_stream_get_codec_timebase() without replacement. diff --git a/libavutil/cpu.c b/libavutil/cpu.c index 9c41d70b52..cdaf9ce8c8 100644 --- a/libavutil/cpu.c +++ b/libavutil/cpu.c @@ -186,6 +186,7 @@ int av_parse_cpu_caps(unsigned *flags, const char *s) { "rvi", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVI }, .unit = "flags" }, { "rvf", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVF }, .unit = "flags" }, { "rvd", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVD }, .unit = "flags" }, + { "rvb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVB }, .unit = "flags" }, { "zve32x", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_I32 }, .unit = "flags" }, { "zve32f", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_F32 }, .unit = "flags" }, { "zve64x", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_I64 }, .unit = "flags" }, diff --git a/libavutil/cpu.h b/libavutil/cpu.h index a25901433e..9f419aae02 100644 --- a/libavutil/cpu.h +++ b/libavutil/cpu.h @@ -92,6 +92,7 @@ #define AV_CPU_FLAG_RVB_ADDR (1 << 8) ///< Address bit-manipulations #define AV_CPU_FLAG_RV_ZVBB (1 << 9) ///< Vector basic bit-manipulations #define AV_CPU_FLAG_RV_MISALIGNED (1 <<10) ///< Fast misaligned accesses +#define AV_CPU_FLAG_RVB (1 <<11) ///< B (bit manipulations) /** * Return the flags which specify extensions supported by the CPU. diff --git a/libavutil/riscv/cpu.c b/libavutil/riscv/cpu.c index 04ac404bbf..e035f4b024 100644 --- a/libavutil/riscv/cpu.c +++ b/libavutil/riscv/cpu.c @@ -72,6 +72,12 @@ int ff_get_cpu_flags_riscv(void) #ifdef RISCV_HWPROBE_EXT_ZBB if (pairs[1].value & RISCV_HWPROBE_EXT_ZBB) ret |= AV_CPU_FLAG_RVB_BASIC; +#if defined (RISCV_HWPROBE_EXT_ZBA) && defined (RISCV_HWPROBE_EXT_ZBS) + if ((pairs[1].value & RISCV_HWPROBE_EXT_ZBA) && + (pairs[1].value & RISCV_HWPROBE_EXT_ZBB) && + (pairs[1].value & RISCV_HWPROBE_EXT_ZBS)) + ret |= AV_CPU_FLAG_RVB; +#endif #endif #ifdef RISCV_HWPROBE_EXT_ZVBB if (pairs[1].value & RISCV_HWPROBE_EXT_ZVBB) @@ -94,6 +100,9 @@ int ff_get_cpu_flags_riscv(void) ret |= AV_CPU_FLAG_RVF; if (hwcap & HWCAP_RV('D')) ret |= AV_CPU_FLAG_RVD; + if (hwcap & HWCAP_RV('B')) + ret |= AV_CPU_FLAG_RVB_ADDR | AV_CPU_FLAG_RVB_BASIC | + AV_CPU_FLAG_RVB; /* The V extension implies all Zve* functional subsets */ if (hwcap & HWCAP_RV('V')) @@ -118,6 +127,10 @@ int ff_get_cpu_flags_riscv(void) #ifdef __riscv_zbb ret |= AV_CPU_FLAG_RVB_BASIC; #endif +#if defined (__riscv_b) || \ + (defined (__riscv_zba) && defined (__riscv_zbb) && defined (__riscv_zbs)) + ret |= AV_CPU_FLAG_RVB; +#endif /* If RV-V is enabled statically at compile-time, check the details. */ #ifdef __riscv_vector diff --git a/libavutil/tests/cpu.c b/libavutil/tests/cpu.c index 02b98682e3..b4b11775d8 100644 --- a/libavutil/tests/cpu.c +++ b/libavutil/tests/cpu.c @@ -90,6 +90,7 @@ static const struct { { AV_CPU_FLAG_RVD, "rvd" }, { AV_CPU_FLAG_RVB_ADDR, "zba" }, { AV_CPU_FLAG_RVB_BASIC, "zbb" }, + { AV_CPU_FLAG_RVB, "rvb" }, { AV_CPU_FLAG_RVV_I32, "zve32x" }, { AV_CPU_FLAG_RVV_F32, "zve32f" }, { AV_CPU_FLAG_RVV_I64, "zve64x" }, diff --git a/libavutil/version.h b/libavutil/version.h index 814892a4d5..852eeef1d6 100644 --- a/libavutil/version.h +++ b/libavutil/version.h @@ -79,7 +79,7 @@ */ #define LIBAVUTIL_VERSION_MAJOR 59 -#define LIBAVUTIL_VERSION_MINOR 28 +#define LIBAVUTIL_VERSION_MINOR 29 #define LIBAVUTIL_VERSION_MICRO 100 #define LIBAVUTIL_VERSION_INT AV_VERSION_INT(LIBAVUTIL_VERSION_MAJOR, \ diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c index de0024099a..016f2329b0 100644 --- a/tests/checkasm/checkasm.c +++ b/tests/checkasm/checkasm.c @@ -295,6 +295,7 @@ static const struct { { "RVD", "rvd", AV_CPU_FLAG_RVD }, { "RVBaddr", "rvb_a", AV_CPU_FLAG_RVB_ADDR }, { "RVBbasic", "rvb_b", AV_CPU_FLAG_RVB_BASIC }, + { "RVB", "rvb", AV_CPU_FLAG_RVB }, { "RVVi32", "rvv_i32", AV_CPU_FLAG_RVV_I32 }, { "RVVf32", "rvv_f32", AV_CPU_FLAG_RVV_F32 }, { "RVVi64", "rvv_i64", AV_CPU_FLAG_RVV_I64 },