From b55aa9a90446c3f6a549b82e0313b221f0fc31ed Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?M=C3=A5ns=20Rullg=C3=A5rd?= <mans@mansr.com>
Date: Mon, 17 Mar 2008 23:08:19 +0000
Subject: [PATCH] get register names from x86_cpu.h

Originally committed as revision 12482 to svn://svn.ffmpeg.org/ffmpeg/trunk
---
 libavcodec/i386/cputest.c          |  9 +--------
 libpostproc/postprocess_template.c | 15 +--------------
 2 files changed, 2 insertions(+), 22 deletions(-)

diff --git a/libavcodec/i386/cputest.c b/libavcodec/i386/cputest.c
index 57b85ff9ce..92e3d64f18 100644
--- a/libavcodec/i386/cputest.c
+++ b/libavcodec/i386/cputest.c
@@ -22,17 +22,10 @@
 
 #include <stdlib.h>
 #include "dsputil.h"
+#include "x86_cpu.h"
 
 #undef printf
 
-#ifdef ARCH_X86_64
-#  define REG_b "rbx"
-#  define REG_S "rsi"
-#else
-#  define REG_b "ebx"
-#  define REG_S "esi"
-#endif
-
 /* ebx saving is necessary for PIC. gcc seems unable to see it alone */
 #define cpuid(index,eax,ebx,ecx,edx)\
     asm volatile\
diff --git a/libpostproc/postprocess_template.c b/libpostproc/postprocess_template.c
index 8789b5fca6..3904d4d4ab 100644
--- a/libpostproc/postprocess_template.c
+++ b/libpostproc/postprocess_template.c
@@ -23,24 +23,11 @@
  * mmx/mmx2/3dnow postprocess code.
  */
 
+#include "x86_cpu.h"
 
 #ifdef ARCH_X86_64
-#  define REGa  rax
-#  define REGc  rcx
-#  define REGd  rdx
-#  define REG_a  "rax"
-#  define REG_c  "rcx"
-#  define REG_d  "rdx"
-#  define REG_SP "rsp"
 #  define ALIGN_MASK "$0xFFFFFFFFFFFFFFF8"
 #else
-#  define REGa  eax
-#  define REGc  ecx
-#  define REGd  edx
-#  define REG_a  "eax"
-#  define REG_c  "ecx"
-#  define REG_d  "edx"
-#  define REG_SP "esp"
 #  define ALIGN_MASK "$0xFFFFFFF8"
 #endif