mirror of
https://github.com/silenty4ng/uv-k5-firmware-chinese-lts
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238 lines
12 KiB
C
238 lines
12 KiB
C
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/*
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* ARM Limited (ARM) is supplying this software for use with Cortex-M
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* processor based microcontroller, but can be equally used for other
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* suitable processor architectures. This file can be freely distributed.
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* Modifications to this file shall be clearly marked.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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*
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* @file ARM_Example.h
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* @brief CMSIS HeaderFile
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* @version 1.2
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* @date 20. July 2018
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* @note Generated by SVDConv V3.3.21 on Friday, 20.07.2018 15:12:22
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* from File 'ARM_Example.svd',
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* last modified on Friday, 20.07.2018 13:11:38
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*/
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/** @addtogroup ARM Ltd.
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* @{
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*/
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/** @addtogroup ARM_Example
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* @{
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*/
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#ifndef ARM_EXAMPLE_H
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#define ARM_EXAMPLE_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @addtogroup Configuration_of_CMSIS
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* @{
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*/
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/* =========================================================================================================================== */
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/* ================ Interrupt Number Definition ================ */
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/* =========================================================================================================================== */
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typedef enum {
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/* ======================================= ARM Cortex-M3 Specific Interrupt Numbers ======================================== */
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Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset */
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NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempted */
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HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault */
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MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Violation
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and No Match */
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BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory
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related Fault */
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UsageFault_IRQn = -10, /*!< -10 Usage Fault, i.e. Undef Instruction, Illegal State Transition */
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SVCall_IRQn = -5, /*!< -5 System Service Call via SVC instruction */
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DebugMonitor_IRQn = -4, /*!< -4 Debug Monitor */
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PendSV_IRQn = -2, /*!< -2 Pendable request for system service */
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SysTick_IRQn = -1, /*!< -1 System Tick Timer */
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/* ======================================== ARM_Example Specific Interrupt Numbers ========================================= */
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TIMER0_IRQn = 0, /*!< 0 Timer 0 interrupt */
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TIMER1_IRQn = 4, /*!< 4 Timer 2 interrupt */
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TIMER2_IRQn = 6 /*!< 6 Timer 2 interrupt */
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} IRQn_Type;
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/* =========================================================================================================================== */
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/* ================ Processor and Core Peripheral Section ================ */
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/* =========================================================================================================================== */
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/* =========================== Configuration of the ARM Cortex-M3 Processor and Core Peripherals =========================== */
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#define __CM3_REV 0x0100U /*!< CM3 Core Revision */
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#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
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#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
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#define __MPU_PRESENT 1 /*!< MPU present or not */
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#define __FPU_PRESENT 0 /*!< FPU present or not */
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/** @} */ /* End of group Configuration_of_CMSIS */
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#include "core_cm3.h" /*!< ARM Cortex-M3 processor and core peripherals */
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#include "system_ARM_Example.h" /*!< ARM_Example System */
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#ifndef __IM /*!< Fallback for older CMSIS versions */
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#define __IM __I
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#endif
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#ifndef __OM /*!< Fallback for older CMSIS versions */
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#define __OM __O
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#endif
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#ifndef __IOM /*!< Fallback for older CMSIS versions */
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#define __IOM __IO
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#endif
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/* ======================================== Start of section using anonymous unions ======================================== */
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#if defined (__CC_ARM)
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#pragma push
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#pragma anon_unions
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#elif defined (__ICCARM__)
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#pragma language=extended
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#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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#pragma clang diagnostic push
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#pragma clang diagnostic ignored "-Wc11-extensions"
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#pragma clang diagnostic ignored "-Wreserved-id-macro"
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#pragma clang diagnostic ignored "-Wgnu-anonymous-struct"
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#pragma clang diagnostic ignored "-Wnested-anon-types"
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#elif defined (__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined (__TMS470__)
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/* anonymous unions are enabled by default */
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#elif defined (__TASKING__)
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#pragma warning 586
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#elif defined (__CSMC__)
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/* anonymous unions are enabled by default */
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#else
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#warning Not supported compiler type
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#endif
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/* =========================================================================================================================== */
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/* ================ Device Specific Peripheral Section ================ */
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/* =========================================================================================================================== */
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/** @addtogroup Device_Peripheral_peripherals
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* @{
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*/
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/* =========================================================================================================================== */
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/* ================ TIMER0 ================ */
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/* =========================================================================================================================== */
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/**
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* @brief 32 Timer / Counter, counting up or down from different sources (TIMER0)
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*/
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typedef struct { /*!< (@ 0x40010000) TIMER0 Structure */
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__IOM uint32_t CR; /*!< (@ 0x00000000) Control Register */
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__IOM uint16_t SR; /*!< (@ 0x00000004) Status Register */
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__IM uint16_t RESERVED;
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__IM uint32_t RESERVED1[2];
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__IOM uint16_t INT; /*!< (@ 0x00000010) Interrupt Register */
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__IM uint16_t RESERVED2;
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__IM uint32_t RESERVED3[3];
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__IOM uint32_t COUNT; /*!< (@ 0x00000020) The Counter Register reflects the actual Value
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of the Timer/Counter */
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__IOM uint32_t MATCH; /*!< (@ 0x00000024) The Match Register stores the compare Value for
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the MATCH condition */
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union {
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__IM uint32_t PRESCALE_RD; /*!< (@ 0x00000028) The Prescale Register stores the Value for the
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prescaler. The cont event gets divided by
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this value */
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__OM uint32_t PRESCALE_WR; /*!< (@ 0x00000028) The Prescale Register stores the Value for the
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prescaler. The cont event gets divided by
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this value */
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};
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__IM uint32_t RESERVED4[9];
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__IOM uint32_t RELOAD[4]; /*!< (@ 0x00000050) The Reload Register stores the Value the COUNT
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Register gets reloaded on a when a condition
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was met. */
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} TIMER0_Type; /*!< Size = 96 (0x60) */
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/** @} */ /* End of group Device_Peripheral_peripherals */
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/* =========================================================================================================================== */
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/* ================ Device Specific Peripheral Address Map ================ */
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/* =========================================================================================================================== */
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/** @addtogroup Device_Peripheral_peripheralAddr
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* @{
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*/
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#define TIMER0_BASE 0x40010000UL
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#define TIMER1_BASE 0x40010100UL
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#define TIMER2_BASE 0x40010200UL
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/** @} */ /* End of group Device_Peripheral_peripheralAddr */
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/* =========================================================================================================================== */
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/* ================ Peripheral declaration ================ */
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/* =========================================================================================================================== */
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/** @addtogroup Device_Peripheral_declaration
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* @{
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*/
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#define TIMER0 ((TIMER0_Type*) TIMER0_BASE)
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#define TIMER1 ((TIMER0_Type*) TIMER1_BASE)
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#define TIMER2 ((TIMER0_Type*) TIMER2_BASE)
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/** @} */ /* End of group Device_Peripheral_declaration */
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/* ========================================= End of section using anonymous unions ========================================= */
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#if defined (__CC_ARM)
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#pragma pop
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#elif defined (__ICCARM__)
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/* leave anonymous unions enabled */
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#elif (__ARMCC_VERSION >= 6010050)
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#pragma clang diagnostic pop
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#elif defined (__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined (__TMS470__)
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/* anonymous unions are enabled by default */
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#elif defined (__TASKING__)
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#pragma warning restore
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#elif defined (__CSMC__)
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/* anonymous unions are enabled by default */
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* ARM_EXAMPLE_H */
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/** @} */ /* End of group ARM_Example */
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/** @} */ /* End of group ARM Ltd. */
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