mirror of
https://github.com/silenty4ng/uv-k5-firmware-chinese-lts
synced 2025-01-15 14:54:40 +00:00
67 lines
1.8 KiB
C
67 lines
1.8 KiB
C
//
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// Created by RUPC on 2024/1/8.
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//
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#include "bsp/dp32g030/timer.h"
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#include "ARMCM0.h"
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uint8_t TIM0_CNT=0;
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void TIM0_ISR()
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{
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TIM0_CNT++;
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TIMERBASE0_IF |= (1 << 0); // 写1清零 清除定时器中断状态
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}
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void TIM0_SET_PSC(uint16_t prescaler) {
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// 确保传入的分频系数在合法范围内（0 到 0xFFFF）
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if (prescaler <= 0xFFFF) {
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// 清除 DIV 位域
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TIMERBASE0_DIV &= ~(0xFFFF); // 通过与操作清除 DIV 位域的内容
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// 设置 DIV 位域为传入的分频系数
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TIMERBASE0_DIV |= prescaler;
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}
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}
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void TIM0_SET_ARR(uint16_t Arr) {
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// 确保传入的分频系数在合法范围内（0 到 0xFFFF）
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if (Arr <= 0xFFFF) {
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// 清除 DIV 位域
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TIMERBASE0_LOW_LOAD &= ~(0xFFFF); // 通过与操作清除 DIV 位域的内容
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// 设置 DIV 位域为传入的分频系数
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TIMERBASE0_LOW_LOAD |= Arr;
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}
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}
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void TIM0_INIT()
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{
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// Define TIMERBASE0 base address
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#define TIMERBASE0_BASE 0x40064000
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#define TIMERBASE_EN_OFFSET 0x00
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#define TIMERBASE_IE_OFFSET 0x10
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#define TIMERBASE_IF_OFFSET 0x14
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// Enable TIMERBASE0
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*((volatile unsigned int *)(TIMERBASE0_BASE + TIMERBASE_EN_OFFSET)) |= 0x1; // Enable LOW_EN
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// Enable Timer0 interrupt
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*((volatile unsigned int *)(TIMERBASE0_BASE + TIMERBASE_IE_OFFSET)) |= 0x1; // Enable LOW_IE
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// Enable global interrupts (assuming your MCU supports this)
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__enable_irq(); // Function to enable interrupts
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//
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// TIM0_SET_PSC(480-1);//48000000/480/100=1000
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// TIM0_SET_ARR(1000);//10ms
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// TIMERBASE0_IF |= (1 << 1) | (1 << 0); // 写1清零 清除定时器中断状态
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// TIMERBASE0_IE |= (1 << 1) | (1 << 0); // 1高 0低 使能定时器中断
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// TIMERBASE0_EN |=(1 << 1) | (1 << 0);//1高 0低 使能定时器
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//
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// __enable_irq();
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}
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