mirror of
https://github.com/silenty4ng/uv-k5-firmware-chinese-lts
synced 2025-01-29 05:33:28 +00:00
76 lines
4.6 KiB
XML
76 lines
4.6 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<!-- File naming: <vendor>_<part/series name>.svd -->
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<!--
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Copyright (C) 2012 - 2018 Arm Limited. All rights reserved.
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Purpose: System Viewer Description (SVD) Example (Schema Version 1.1)
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This is a description of a none-existent and incomplete device
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for demonstration purposes only.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of ARM nor the names of its contributors may be used
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to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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-->
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<device schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd" >
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<vendor>ARM Ltd.</vendor> <!-- device vendor name -->
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<vendorID>ARM</vendorID> <!-- device vendor short name -->
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<name>ARMCM1</name> <!-- name of part-->
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<series>ARM Cortex M0+</series> <!-- device series the device belongs to -->
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<version>1.0</version> <!-- version of this description, adding CMSIS-SVD 1.1 tags -->
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<description>ARM 32-bit Cortex-M0+ based device.</description>
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<licenseText> <!-- this license text will appear in header file. \n force line breaks -->
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ARM Limited (ARM) is supplying this software for use with Cortex-M\n
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processor based microcontroller, but can be equally used for other\n
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suitable processor architectures. This file can be freely distributed.\n
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Modifications to this file shall be clearly marked.\n
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\n
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THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\n
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OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\n
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\n
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ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\n
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CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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</licenseText>
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<cpu> <!-- details about the cpu embedded in the device -->
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<name>CM1</name>
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<revision>r0p0</revision>
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<endian>little</endian>
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<mpuPresent>false</mpuPresent>
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<fpuPresent>false</fpuPresent>
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<vtorPresent>false</vtorPresent>
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<nvicPrioBits>2</nvicPrioBits>
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<vendorSystickConfig>false</vendorSystickConfig>
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</cpu>
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<addressUnitBits>8</addressUnitBits> <!-- byte addressable memory -->
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<width>32</width> <!-- bus width is 32 bits -->
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<!-- default settings implicitly inherited by subsequent sections -->
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<size>32</size> <!-- this is the default size (number of bits) of all peripherals
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and register that do not define "size" themselves -->
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<access>read-write</access> <!-- default access permission for all subsequent registers -->
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<resetValue>0x00000000</resetValue> <!-- by default all bits of the registers are initialized to 0 on reset -->
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<resetMask>0xFFFFFFFF</resetMask> <!-- by default all 32Bits of the registers are used -->
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</device>
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